? semiconductor components industries, llc, 2011 april, 2011 ? rev. 1 1 publication order number: CM6136/d CM6136 single-channel transient voltage suppressor product description on semiconductor?s CM6136 is an application specific integrated passive (asip ) component in a 2 x 2, 4 ? bump, 0.4 mm pitch, csp form factor. this device is designed for: ? fuse ? transient voltage suppression (tvs) ? electrostatic discharge protection ? electrical overstress protection features ? 4 ? bump, 0.8 mm x 0.8 mm footprint chip scale package (csp) ? these devices are pb ? free and are rohs compliant table 1. pin descriptions 4 ? bump csp package pin description a1 fuse terminal 1 a2 tvs channel / fuse terminal 2 b1 & b2 device ground package / pinout diagrams bottom view (bumps up view) top view (bumps down view) fx 4 ? bump csp package + 12 a b orientation marking a b a1 a2 b1 b2 a1 1 2 orientation marking x = single digit date code marking diagram device package shipping ? ordering information http://onsemi.com wlcsp4 (pb ? free) 10,000/tape & reel CM6136 f = CM6136 x = single digit date code wlcsp4 cp suffix case 567ca ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. electrical schematic gnd b1 & b2 tvs a2 fuse a1 fx
CM6136 http://onsemi.com 2 electrical specifications and conditions table 2. absolute ratings parameter rating units failing to nonconductive, i 2 t ? from a1 pin to device ground (maximum i pp value using 10/1000 s pulse). see notes 1 and 2. 4 a failing to nonconductive, i 2 t ? from a2 pin to device ground (maximum i pp value using 10/1000 s pulse). see notes 1 and 2. 50 a 1. the device must not burn to open ? circuit, when the value is below maximum i pp . 2. this parameter is characterized at 25 c using an on semiconductor ? specific test board. table 3. parameters and operating conditions parameter rating units storage temperature range ?55 to +150 c operating temperature range ?30 to +85 c table 4. electrical operating characteristics (note 1) symbol parameter conditions min typ max units r resistance a1 ? a2 b1 and b2 floating (note 2) 50 m r open resistance after open fuse b1 and b2 floating 1 m t fuse fusing time b1 and b2 floating; i = 5 a (note 3) 100 ms t life fuse life time b1 and b2 floating; i = 2 a (notes 3, 4 and 9) 4000 hours i off stand ? off quiescent current from a1 pin to b1 and b2 pins; stand ? off voltage v off = 12 v 100 na v br break down voltage from a1 pin to b1 and b2 pins; break down current i br = 20 ma (note 6) 15.5 v v cl clamping voltage during transient from a1 pin to b1 and b2 pins; clamping current i cl = 1 a (notes 6 and 7) 19.5 v v f forward voltage from a1 pin to b1 and b2 pins; forward current i f = 850 ma 1.3 v c l1 line capacitance v bias = 0 v 190 pf c l2 v bias = 5 v 73 92 pf v esd esd protection peak discharge voltage at a1 pin or a2 to b1 and b2 a) contact discharge per iec 61000 ? 4 ? 2 standard b) air discharge per iec 61000 ? 4 ? 2 standard (note 8) 30 30 kv f c minimum attenuation freq = 80 mhz ? 1 ghz freq = 1 ? 4 ghz r source = r load = 50 8 20 db 1. all parameters specified for t a = 25 c unless otherwise noted. characterization data for dc parameters is taken from ? 30 c to 85 c. 2. this parameter is measured using low current to avoid self ? heating. 3. these parameters are characterized using on semiconductor ? specific test boards. 4. fuse is considered failed when its resistance is higher than 1 . 5. cumulative distribution of v br between 15.5 v and 16.0 v is about 4.5%. 6. transient: 8 x 20 s current pulse. 7. cumulative distribution of v cl between 19.0 v and 19.5 v is about 4.5%. 8. standard iec 61000 ? 4 ? 2 with c discharge = 150 pf, r discharge = 330 . 9. fuse lifetime is extrapolated from accelerated life test (alt) at 125 c.
CM6136 http://onsemi.com 3 rf characteristics t a = 25 c, 50 environment figure 1. insertion loss (0 v and 5 v bias) 0 db ? 10 db ? 20 db ? 30 db ? 40 db ? 50 db fr equen cy (mh z) in ser tion los s 3 10 100 1000 2000 60 00 5v 0v
CM6136 http://onsemi.com 4 package dimensions wlcsp4, 0.8x0.8 case 567ca ? 01 issue o seating plane 0.05 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. 2x dim a min max 0.47 millimeters a1 d 0.80 bsc e b 0.24 0.29 e 0.40 bsc 0.53 d e a b pin a1 reference e a 0.05 b c 0.03 c 0.05 c 4x b 12 b a 0.05 c a a1 a2 c 0.17 0.24 0.80 bsc 0.05 c 2x top view side view bottom view note 3 e a2 0.30 ref pitch 0.25 4x dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.40 0.40 recommended a1 package outline pitch on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 CM6136/d application specific integrated passive is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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